Aramadhan

PCB or Printed Circuit Board is the physical implementation of an electronic circuit. PCB design is a very specialized task, an art which can only be mastered through training or attained with experience. For a novice electronic hobbyist, laying out a PCB design might turn out to be a pretty daunting task, especially if the circuit consists of a few hundred components and if there are lot of constraints, both mechanical and electrical. No matter how efficient the circuit design is, if the PCB design is not done efficiently the product may not even work.

In this article, you will know about:

Standards

CAD Software used for Design

PCB Design Flow

Footprint Creation

Constraint Definition

Component Placement

Routing

Design Rules Checking (DRC)

Gerber file generation

PCB design for EMC compliance – Best practices

PCB Thermal management

Single layer PCB design

Conclusion

In the early days, PCB design was manually implemented by drawing out the layout using pens or sticking adhesive tapes on a transparent film. But nowadays, it is a fully automated process which makes use of complex Computer Aided Design (CAD)software. This article is meant to serve as a guide to get through the nittygritties of PCB design fundamentals.

The primary building block of any PCB is the substrate, which in most cases in made up of FR4 glass epoxy. FR4 is a composite material made of woven fiberglass cloth with an epoxy resin binder that is fire resistant. FR4 stands for Fire retardant grade 4. The substrate mechanically supports the electronic components which are mounted on it. The components are connected to each other using conductive copper traces, which are etched out on the substrate, which is an insulator. Printed Circuit Board design involves the efficient layout of components on the board area and the layout of the pattern of interconnecting traces.

1. Standards

Standards by the Association Connecting Electronics Industries or IPC is the most widely followed and complied with, in connection with PCB design. Some of the IPC PCB design standards are listed below:
IPC-2221B: Generic Standard on Printed Circuit Board Design
IPC-7351: Generic requirements for Surface Mount Land Pattern and design

By complying to the above two standards, you can make sure that your PCB complies to a global standard and speaks the same language as any other PCB designed anywhere in the world which comply to the same standard.

2. CAD Software

Numerous CAD Software packages are available for PCB design. Mostly schematics capture and PCB layout are integrated in a single software package. Some of the popular freeware PCB CAD software packages are DipTrace, EagleCAD, KiCAD, ExpressPCB, gEDA, Fritzing etc. Some of these freeware packages have design limitations and one would have to buy the full version to use all the features.

The best among these is without doubt KiCAD, which is an open source software, available for a wide range of operating systems and completely free. DipTrace and EagleCAD are pretty capable PCB design packages too, but their free version have limitations on either the number of pins or the number of layers or both. To use all the advanced features, one would have to buy the full version.

Among the high end PCB design software, Altium Designer (Formerly Protel PCB), Cadence Allegro, Mentor Graphics PADS PCB and Xpedition. Among them, my vote goes to Altium Designer, for tight integration between schematics and PCB, ease of use, 3-Dimensional capabilities, integrated EMI analysis etc.

3. PCB Design Flow

The process flow for a generic Printed Circuit Board design is shown above. It is assumed that the component selection and Schematic capture is complete and the PCB layout design is all set to begin.Setting up the workspace area is the first task a PCB designer performs. It begins with setting a Grid and the measurement units. This is generally called a “snap grid” since the cursor snaps to the grid while moving around the workspace. Using a grid is important because it makes symmetrical placement of components easier and also simplifies layout of traces without uniform clearances.

The choice of units is between imperial and metric units. Imperial units have been traditionally followed by PCB designers around the world. Also a lot of electronic components are manufactured with imperial pin spacing.

This is followed by defining the board outline. Many CAD software allows importing a CAD drawing file as the board outline. If this is not available, the outline has to be created manually.

4. Footprint Creation

Once Schematic capture is complete, an output of the process is the Bill of Materials (BOM) document. Using the BOM, the PCB designer can begin creation of footprints. Footprints of standard packages will already be available in the PCB design software libraries. Those which are not available will have to be created by the designer using the corresponding datasheets as reference. Assigning PCB footprints to components at the schematic capture stage itself will make the job of the PCB layout designer much easier. Ensuring that the footprints created comply with IPC-7351, will make sure that there are no assembly issues at least as far as footprints are concerned.

5. Constraint Definition

PCB design constraints can be classified into Mechanical constraints, Electrical constraints, Design for Manufacturability (DFM) constraints and Design for Testability (DFT) constraints. The PCB constraint editor available in Altium designer is shown above.

Mechanical constraints generally involves restrictions such as positions of connectors, LEDs, LCD display, mounting holes etc., component height restrictions, Board shape and size etc.

Electrical constraints are related to the actual circuit that is being layout on the PCB. These constraints can be pre-set in the CAD software so that while designing the layout, the software will indicate whenever there is a violation of the rules set. Limits such as trace width, trace to trace clearance, trace to pad clearance, pad to pad clearance, pad/trace clearance to board edge etc., can be set using the constraints editor. Additionally specific constraints such as impedance control for high speed lines, differential trace routing, bus routing etc., can also be set. Presetting such constraints will reduce the design cycle time by reducing the number of iterations.

Design for Fabrication (DFF) and Design for Assembly (DFA) together make up Design for Manufacturability (DFM). Complying with DFM constraints will mean that the PCB layout design will be manufacturable. The objective of DFM is to minimize assembly failures and also reduce cost. Some of the critical DFM guidelines for PCB design are listed below:

Components selected verified for obsolescence and guaranteed availability for atleast the next five years
Distance between surface mount and plated through hole (PTH) components are adequate
Components are placed with a minimum clearance of 1.5mm (IPC 2221) from the edge of the board
Orientation symbols for components to be provided, for example pin no.1 indication for connectors and ICS, Anode/Cathode indication for diodes, Positive/negative indication for polar components like electrolytic capacitors
Connections to internal plane layers are made through thermal pads
Avoid acid traps and slivers



Fix minimum trace width and clearance after confirming with the fabrication house
Proper solder mask definition for component pads
Layer stack design should be symmetrical to minimize the risk of warpage of the board
Balance copper area distribution if possible
Use panelization to minimize wastage of the base material
Aspect ratio for a PCB is defined as the ratio of the board thickness to the drill size. Ensuring that the aspect ratio is < 10:1, makes sure that the PCB is manufacturable. It would also do well to confirm with the intended Fab house. Smaller ratios result in more uniform plating in hole.
Use standard copper thickness of 0.5 oz unless otherwise specified.
Check with Fab house for minimum thickness of legend text
Use a minimum of 3 board fiducials and if there are components with pad pitch ≤ 10 mils, use component fiducials as well. Board fiducials are placed at the corners and component fiducials are placed near pin no.1 of the component.
Check for oversized or overlapping solder mask
As far as possible component placement should be restricted to a single side and orientation of components should be in the same direction.
Select the optimum PCB surface finish for the corresponding application



Design for Testability constraints intend to make the PCB capable of being tested, both functional testing and In-Circuit Testing (ICT). Ideally, a 100% test point coverage is desirable. But space constraints on the PCB not allowing, it is then the discretion of the designer to decide which electrical nodes require assignment of test points. Functional testing is intended to validate the electrical design functionality and ICT is intended to detect any manufacturing defects. Both functional testers and ICT access the PCB under test through a Bed-of-nails fixture and connectors. The test points provided on the PCB serve as access points for the testers and hence the test points –

Should be on a grid of not less than 100 mils (1 mil = 0.001”)
Should be accessible from the bottom side of the PCB

6. Component Placement

Component placement is one of the most critical stages of PCB layout design. Depending on how efficiently the component placement is done, the trace routing will be that much easier. In general the component placement is based on electrical function, thermal management and electrical noise considerations.

There are two units generally used for PCB design – Imperial and Metric. The Imperial units are more popular among the PCB designers but currently the metric units are becoming the defacto standard in the PCB industry. Begin by making a PCB floor plan and decide which group of components will occupy which areas of the board. Following are the generic guidelines for effective and efficient component placement:

Begin by placing the critical components like Microprocessor/Microcontroller, clock circuit, DDR memory etc., and the fixed position components like connectors, LEDs, LCD display etc.
Use a grid of 100 or 50 mils for placing the critical components and a 25 mil grid for placing the other components
Segregate the Analog, Digital and Power supply circuit components and isolate them from each other
Place the clock and other high speed circuitry as far away from the I/O circuit as possible.
As far as possible, place all components on a single side. If absolutely unavoidable, place the low profile passive components on the bottom side
Place the following in close proximity
Decoupling capacitors to the power pins.
Series termination resistors to the source pins
EMI filters to signal entry point
Orient the components in a similar fashion during placement for ease of assembly
Do not place component legends on pads

7. Routing

With the component placement complete, it is now time to route the traces. Traces on a PCB can be power/ground traces or signal traces. Further, signal traces can be analog or digital.



We begin by designing the layer stack. For the current high speed designs, the minimum number of layers is 4. Two signal layers, a power plane and ground plane. Having a power plane and ground plane not only ensures efficient routing of the signal traces, but also good EMI-EMC compliance. Having an unbroken return path underneath every high speed trace ensures that there are no ground loops, which are one of the major reasons for emissions. As a rule of thumb, a 4 layer board will produce 15dB less emissions than a two layer board.

Quoting from “EMC and Printed Circuit Board” by Mark I Montrose – “When clock speeds are in excess of 5MHz or rise times are faster than 5ns, a multilayer board should be used”.

Traces on a multilayer board with at least one power and ground plane can be routed in a micro strip or a stripline configuration.





While designing a layer stackup, the following factors are to be considered:
A signal layer should be adjacent to an internal plane layer
The signal layer and the adjacent plane layer should be tightly coupled: use minimum thickness of dielectric between these layers
The power plane and ground plane should be closely coupled. The thickness of the dielectric between the planes should be minimum. Thus the two planes combined with the dielectric will act as a large embedded capacitance.
The layer stackup is symmetrical
Multiple ground planes will reduce the ground impedance of the PCB and hence reduce common mode radiation.

Generic guidelines for track routing is given below:
Minimum track width and clearance can be arrived upon after confirmation with the fab house. It is recommended to have a minimum track width and clearance of 8 mils for low to medium complexity PCBs. High current trace width needs to be calculated based on the maximum current and expected temperature rise.
Route the high speed signals and power and ground connections first, followed by the remaining connections.
Route the clock circuit with as short traces as possible.
Avoid running high speed traces in parallel as this will introduce crosstalk
On a multilayer board, the power and ground connections are to be made to the planes using short traces from the pins of the components. Thermal reliefs are to be used to make the connection to the plane. Follow the 20H rule for power and ground planes wherein the power plane is recessed from the edge of the board by a distance equal to 20 times the thickness of the dielectric between the two planes.
The 3W rule states that in order to avoid cross-talk between signals, the distance between the traces should be equal to or greater than 3 times the width of the trace.
Avoid creating discontinuities in the ground plane. This would increase the loop area.
In a mixed signal board, split the ground plane into analog and digital grounds and route the corresponding signals over the respective planes.
Track bends should be made at 45° and never at 90°.
If traces are to cross each other, they should do so at 90°, so as to minimize mutual capacitance and inductance.
Use impedance controlled traces wherever necessary
Minimize the use of vias, since vias add inductance to the traces.
All high speed traces whose propagation time is greater than or equal to the signal rise/fall times should be terminated using series resistance

To make the critical calculations such as trace width, differential routing parameters, cross-talk etc., there are many free PCB design tools available which could be used. Some of the freely available tools are Saturn PCB design toolkit and AppCAD.

8. Design Rules Checking (DRC)

Design Rules Checking (DRC) is a powerful automated feature than is available in most PCB design software that checks the design against any or all of the design rules set during the constraint definition stage. Running the DRC results in the generation of a report which is used as reference to clear the violations of the constraints.



Shown above is the DRC window in Altium Designer. Click on image for a larger view.

9. Gerber file generation

Once all errors listed in the DRC report are corrected and other review comments are updated in the PCB design, the designer can move towards generating Gerber file for PCB fabrication. Gerber format is a standard format used by the electronics industry for communicating the PCB design information to fabrication. It is an open ASCII vector format for 2D binary images. The set of documents for fabrication consists of a gerber file for each image layer of the PCB design. A standard set of files consist of a gerber file for :